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PRELIMINARY
CY28443
Document #: 38-07716 Rev *C
Page 22 of 25
Test and Measurement Set-up
For PCI Single-ended Signals and Reference
The following diagram shows test load configurations for the
single-ended PCI, USB, and REF output signals.
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
PCI/
USB
REF
33
Ω
M easurem ent
Point
5 pF
60
Ω
12
Ω
M easurem ent
Point
5 pF
60
Ω
12
Ω
M easurem ent
Point
5 pF
60
Ω
Figure 14.Single-ended Load Configuration Low Drive Option
PCI/
USB
RE F
12
Ω
M easurem ent
Point
5 pF
60
Ω
12
Ω
M easurem ent
Point
5 pF
60
Ω
12
Ω
M easurem ent
Point
5 pF
60
Ω
12
Ω
M easurem ent
Point
5 pF
60
Ω
12
Ω
M easurem ent
Point
5 pF
60
Ω
Figure 15. Single-ended Load Configuration High Drive Option
CP U T
CP U C
33
Ω
33
Ω
49. 9
Ω
49 . 9
Ω
M eas u r em ent
Po in t
2 pF
475
Ω
IR E F
M e as ur em e n t
Po in t
2 pF
SR C T
SR C C
10 0
Ω D if fer entia l
DO T 9 6 T
DO T 9 6 C
96 _1 00_ S S C T
96 _1 00_ S S C C
Figure 16. 0.7V Differential Load Configuration
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