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WM9715L Datasheet(PDF) 68 Page - Wolfson Microelectronics plc

Part # WM9715L
Description  AC??7 Audio and Touchpanel CODEC
PDF  77 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM9715L Datasheet(HTML) 68 Page - Wolfson Microelectronics plc

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WM9715L
Production Data
w
PD Rev 4.0 December 2007
68
Register 3Ah controls the SPDIF output.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
15
V
0
Validity bit; ‘0’ indicates frame valid, ‘1’ indicates frame not
valid
14
DRS
0
Indicates that the WM9715L does not support double rate
SPDIF output (read-only)
13:12
SPSR
10
Indicates that the WM9715L only supports 48kHz
sampling on the SPDIF output (read-only)
11
L
0
Generation level; programmed as required by user
10:4
CC
0000000
Category code; programmed as required by user
3
PRE
0
Pre-emphasis; ‘0’ indicates no pre-emphasis, ‘1’ indicates
50/15us pre-emphasis
2
COPY
0
Copyright; ‘0’ indicates copyright is not asserted, ‘1’
indicates copyright
1
AUDIB
0
Non-audio; ‘0’ indicates data is PCM, ‘1’ indicates non-
PCM format (e.g. DD or DTS)
3Ah
0
PRO
0
Professional; ‘0’ indicates consumer, ‘1’ indicates
professional
Digital Audio
(SPDIF)
Output
Register 4Ch (together with register 56h) controls the outputs ADCIRQ, PENDOWN, GENIRQ and SPDIF_OUT.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
5
GC5
1 (off)
‘0’ enables the SPDIF_OUT pin (note that GE5 in register 56h
must also be set to 0, and SEN in register 2Ah to 1)
4
GC4
1 (off)
‘0’ enables the ADCIRQ pin (note that GE4 in register 4Ch must
also be set to 0).
3
GC3
1 (off)
‘0’ enables the PENDOWN pin (note that GE3 in register 4Ch
must also be set to 0).
4Ch
2
GC2
1 (off)
‘0’ enables the GENIRQ pin (note that GE2 in register 4Ch must
also be set to 0).
Interrupt
Control
Register 4Eh to 54h control the processing of GENIRQ interrupt signals.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
4Eh
all 1
Controls interrupt polarity
50h
all 0 (not sticky)
Makes interrupt bits sticky
52h
all 0 (OFF)
Enables wake-up for each interrupt
54h
= status of
internal interrupt
signal
Interrupt status (read from inputs, write ‘0’ to clear sticky bits)
15
Controls Comparator 1 interrupts
14
Controls Comparator 2 interrupts
13
Controls Pen-Down interrupts
12
Controls AUXADC data available interrupts
11
please
refer to
the
register
map
Controls Thermal sensor interrupts
Interrupt
Control



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