TMS320C6000GDPA167 datasheet(12/148 Pages) TI

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TMS320C6713

FLOATINGPOINT DIGITAL SIGNAL PROCESSOR

SPRS186L − DECEMBER 2001 − REVISED NOVEMBER 2005

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

device characteristics

Table 2 provides an overview of the C6713 DSP. The table shows significant features of the device, including

the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count. For more

details on the C67x

 DSP device part numbers and part numbering, see Figure 12.

Table 2. Characteristics of the C6713 Processor

HARDWARE FEATURES

INTERNAL CLOCK

SOURCE

C6713

(FLOATING-POINT DSP)

HARDWARE FEATURES

SOURCE

GDP

PYP

Peripherals

EMIF

SYSCLK3 or ECLKIN

1 (32 bit)

1 (16 bit)

Peripherals

Not all peripheral pins are

EDMA

(16 Channels)

CPU clock frequency

Not all peripheral pins are

available at the same

HPI (16 bit)

SYSCLK2

available at the same

time. (For more details,

see the Device

McASPs

AUXCLK, SYSCLK2†

see the Device

Configurations section.)

I2Cs

SYSCLK2

Configurations section.)

Peripheral performance is

McBSPs

SYSCLK2

Peripheral performance is

dependent on chip-level

32-Bit Timers

1/2 of SYSCLK2

dependent on chip-level

configuration.

GPIO Module

SYSCLK2

Size (Bytes)

264K

On-Chip Memory

Organization

4K-Byte (4KB) L1 Program (L1P) Cache

4KB L1 Data (L1D) Cache

64KB Unified L2 Cache/Mapped RAM

192KB L2 Mapped RAM

CPU ID+CPU Rev ID

Control Status Register (CSR.[31:16])

0x0203

BSDL File

For the C6713 BSDL file, contact your Field Sales Representative.

Frequency

MHz

225, 200

200, 167

Cycle Time

4.4 ns (C6713GDP-225)

5 ns (C6713GDPA-200)

5 ns (C6713PYP-200)

6 ns (C6713PYPA−167)

Voltage

Core (V)

1.20‡ V

1.2 V

Voltage

I/O (V)

3.3 V

Clock Generator Options

Prescaler

Multiplier

Postscaler

/1, /2, /3, ..., /32

x4, x5, x6, ..., x25

/1, /2, /3, ..., /32

27 x 27 mm

272-Ball BGA (GDP)

−

Packages

28 x 28 mm

−

208-Pin PowerPAD



PQFP (PYP)

Process Technology

µm

0.13

Product Status

Product Preview (PP)

Advance Information (AI)

Production Data (PD)

PD§

† AUXCLK is the McASP internal high-frequency clock source for serial transfers. SYSCLK2 is the McASP system clock used for the clock

check (high-frequency) circuit.

‡ This value is compatible with existing 1.26−V designs.

§ PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include testing of all parameters.

C67x is a trademark of Texas Instruments.

TMS320C6000GDPA167 Datasheet(PDF) 12 Page - Texas Instruments

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