MTL007F datasheet(46/65 Pages) ETC2

46 / 65 page

MTL007

page 46 of 65

Since the Dithering Table is downloadable, this data port is the entry address.

D7-0

DITHER_REG[7:0]

Gamma Table Data Port (Address 9Fh) (R/W)

Since the Gamma Table is downloadable, this data port is the entry address.

D7-0

GAMMA_PORT[7:0]

OSD Control Registers 0 (Address A0h) (R/W)

OSD Output Clock Select

0: from Internal Display Dot Clock;

1: from Internal Display Dot Clock x 2

OSD Output VS Invert

0: Normal;

1: Invert

*D5-4

OSD Output VS Select

00: Display VDE, when Reg. 89h/D1=0;

Display VBDE, when Reg. 89h/D1=1;

01: Display VS;

1x: Input VS

OSD Function

0: OFF;

1: ON

Reserved

D1-0

OSD TYPE Select

00: OSDRGB = {R0000000, G0000000, B0000000};

01: OSDRGB = {RR000000, GG000000, BB000000};

10: OSDRGB = {RRRR0000, GGGG0000, BBBB0000};

11: OSDRGB = {RRRRRRRR, GGGGGGGG, BBBBBBBB};

R = OSDR, G = OSDG, B = OSDB

OSD Control Register 1 (Address A1h) (R/W)

OSD Output HS Invert;

0: Normal;

1: Invert.

OSD Output DCLK Invert;

0: Normal;

1: Invert.

D5-4

OSD Output HS Delay

4 steps to change, each of them is 1ns delay/step.

OSD Input Data Sample Clock Invert

0: Normal;

1: Invert.

MTL007F Datasheet(PDF) 46 Page - List of Unclassifed Manufacturers

MTL007F Datasheet(HTML) 46 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

Datasheet Download

Link URL