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DRA752ABC Datasheet(PDF) 141 Page - Texas Instruments

Part # DRA752ABC
Description  DRA75x, DRA74x Infotainment Applications Processor Silicon Revision 2.0
PDF  443 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DRA752ABC Datasheet(HTML) 141 Page - Texas Instruments

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T
overshoot
T
undershoot
T
period
Overshoot = 20% of nominal
IO supply voltage
Undershoot = 20% of nominal
IO supply voltage
Nominal IO
supply voltage
VSS
osus_sprs851
141
DRA756, DRA755, DRA754, DRA752
DRA751, DRA750, DRA746, DRA745, DRA744
www.ti.com
SPRS950F – DECEMBER 2015 – REVISED MAY 2019
Submit Documentation Feedback
Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744
Specifications
Copyright © 2015–2019, Texas Instruments Incorporated
Table 5-1. Absolute Maximum Rating Over Junction Temperature Range (continued)
PARAMETER(1)
MIN
MAX
UNIT
VIO (Steady-State)
Input and Output Voltage Ranges
(Steady-State)
Core I/Os
-0.3
1.5
V
Analog I/Os (except HDMI)
-0.3
2.0
V
HDMI I/Os
-0.3
3.5
V
I/O 1.35V
-0.3
1.65
V
I/O 1.5V
-0.3
1.8
V
1.8V I/Os
-0.3
2.1
V
3.3V I/Os (except those powered by
vddshv8)
-0.3
3.8
V
3.3V I/Os (powered by vddshv8)
-0.3
3.6
V
SR
Maximum slew rate, all supplies
105
V/s
VIO (Transient Overshoot /
Undershoot)
Input and Output Voltage Ranges (Transient Overshoot/Undershoot)
Note: valid for up to 20% of the signal period. See Figure 5-1, IO transient
voltage ranges
0.2*VDD
(2)
V
TJ
Operating junction temperature
range
Automotive
-40
125
°C
TSTG
Storage temperature range after soldered onto PC Board
-55
+150
°C
Latch-up I-Test
I-test(3), All I/Os (if different levels then one line per level)
-100
100
mA
Latch-up OV-Test
Over-voltage Test(4), All supplies (if different levels then one line per level)
N/A
1.5*Vsup
ply max
V
(1) See I/Os supplied by this power pin in Table 4-2 Ball Characteristics.
(2) VDD is the voltage on the corresponding power-supply pin(s) for the IO.
(3) Per JEDEC JESD78 at 125°C with specified I/O pin injection current and clamp voltage of 1.5 times maximum recommended I/O
voltage and negative 0.5 times maximum recommended I/O voltage.
(4) Per JEDEC JESD78 at 125°C.
(5) The maximum valid input voltage on an IO pin cannot exceed 0.3 volts when the supply powering the IO is turned off. This requirement
applies to all the IO pins which are not fail-safe and for all values of IO supply voltage. Special attention should be applied anytime
peripheral devices are not powered from the same power sources used to power the respective IO supply. It is important the attached
peripheral never sources a voltage outside the valid input voltage range, including power supply ramp-up and ramp-down sequences.
(1)
Tovershoot + Tundershoot < 20% of Tperiod
Figure 5-1. IO transient voltage ranges
5.2
ESD Ratings
Table 5-2. ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-Body model (HBM), per AEC Q100-002(1)
±1000
V
Charged-device model (CDM), per AEC
Q100-011
All pins
±250
Corner pins (A1,
AH1, A28, AH28)
±750



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