AD8192 datasheet(3/28 Pages) AD

3 / 28 page

AD8192

Rev. 0 | Page 3 of 28

SPECIFICATIONS

TA = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, VREF_AB = 5 V, VREF_COM = 5 V,

AVEE = 0 V, DVEE = 0 V, differential input swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, unless

otherwise noted.

Table 1. TMDS Performance Specifications

Parameter

Conditions/Comments

Min

Typ

Max

Unit

TMDS DYNAMIC PERFORMANCE

Maximum Data Rate (DR) per

Channel

NRZ

2.25

Gbps

Bit Error Rate (BER)

PRBS 223 − 1

10−9

Added Data Jitter

≤ 2.25 Gbps, PRBS 27 − 1, no equalization

ps (p-p)

Added Clock Jitter

ps (rms)

Differential Intrapair Skew

At output

Differential Interpair Skew

At output

TMDS EQUALIZATION PERFORMANCE

Receiver (Highest Setting)1

Boost frequency = 1.125 GHz

Transmitter (Highest Setting)2

Boost frequency = 1.125 GHz

TMDS INPUT CHARACTERISTICS

Input Voltage Swing

Differential

150

1200

Input Common-Mode Voltage (VICM)

AVCC − 800

AVCC

TMDS OUTPUT CHARACTERISTICS

High Voltage Level

Single-ended high speed channel

AVCC − 200

AVCC + 10

Low Voltage Level

Single-ended high speed channel

AVCC − 600

AVCC − 400

Rise/Fall Time (20% to 80%)3

DR = 2.25 Gbps

150

TMDS TERMINATION

Input Termination Resistance

Single-ended

Output Termination Resistance

Single-ended

1 Output meets transmitter eye diagram as defined in the DVI Standard Revision 1.0 and HDMI Standard Revision 1.3a.

2 Cable output meets receiver eye diagram mask as defined in the DVI Standard Revision 1.0 and HDMI Standard Revision 1.3a.

3 Output rise/fall time measurement excludes external components such as HDMI connector or external ESD protection diodes. See Applications Information section for

more information.

Table 2. Auxiliary Channel Performance Specifications

Parameter

Symbol

Conditions/Comments

Min

Typ

Max

Unit

DDC CHANNELS

Input Capacitance

CAUX

DC bias = 2.5 V, ac voltage = 3.5 V p-p, f = 100 kHz

Input Low Voltage

VIL

0.5

Input High Voltage

VIH

0.7 × VREF1

Output Low Voltage

VOL

IOL = 5 mA

0.4

Output High Voltage

VOH

VREF1

Rise Time

10% to 90%, no capacitive load

140

Fall Time

90% to 10%, CLOAD = 400 pF

100

200

Leakage

μA

CEC CHANNEL

Input Capacitance

CAUX

DC bias = 1.65 V, ac voltage = 2.5 V p-p, f = 100 kHz

Input Low Voltage

VIL

0.8

Input High Voltage

VIH

2.0

Output Low Voltage

VOL

RPULLUP = 3 kΩ to +3.3 V

0.6

Output High Voltage, VOH

2.5

AVCC

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