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LAN9312 Datasheet(PDF) 279 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 279 Page - SMSC Corporation |
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279 / 458 page  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet SMSC LAN9312 279 Revision 1.2 (04-08-08) DATASHEET 14.3.7 Host MAC MII Data Register (HMAC_MII_DATA) This read/write register is used in conjunction with the Host MAC MII Access Register (HMAC_MII_ACC) to access the internal PHY registers. This register contains either the data to be written to the PHY register specified in the HMAC_MII_ACC Register, or the read data from the PHY register whose index is specified in the HMAC_MII_ACC Register. Offset: 7h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31:16 RESERVED RO - 15:0 MII Data This field contains the 16-bit value read from the PHY read operation or the 16-bit data value to be written to the PHY before an MII write operation. R/W 0000h |
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