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LAN9312 Datasheet(PDF) 281 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 281 Page - SMSC Corporation |
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281 / 458 page  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet SMSC LAN9312 281 Revision 1.2 (04-08-08) DATASHEET 0 Flow Control Busy (FCBSY) In full-duplex mode, this bit should read logical 0 before writing to the Host MAC Flow Control (HMAC_FLOW) register. To initiate a PAUSE control frame, the bit must be set. During a transfer of control frame, this bit continues to be set, signifying that a frame transmission is in progress. After the PAUSE control frame’s transmission is complete, the Host MAC resets the bit to 0. Backpressure Enable (BkPresEn) In half-duplex mode, this signal functions as a backpressure enable and is set high whenever backpressure is transmitted. Notes: When writing this register, the FCBSY bit must always be zero. Applications must always write a zero to this bit R/W 0b BITS DESCRIPTION TYPE DEFAULT |
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