LAN9312 datasheet(366/458 Pages) SMSC

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LAN9312 Datasheet(PDF) 366 Page - SMSC Corporation

Part #	LAN9312

Description	High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

PDF	458 Pages

Scroll/Zoom	100%

Manufacturer	SMSC [SMSC Corporation]

Direct Link	http://www.smsc.com

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366 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Revision 1.2 (04-08-08)

366

SMSC LAN9312

DATASHEET

14.5.2.44

Port x MAC Interrupt Pending Register (MAC_IPR_x)

This read-only register contains the pending Port x interrupts. A set bit indicates an interrupt has been

triggered. All interrupts in this register may be masked via the Port x MAC Interrupt Pending Register

(MAC_IPR_x) register. Refer to Chapter 5, "System Interrupts," on page 49 for more information.

Note:

There are no possible Port x interrupt conditions available. This register exists for future use.

Port0: 0481h

Size:

32 bits

Port1: 0881h

Port2: 0C81h

BITS

DESCRIPTION

TYPE

DEFAULT

31:0

RESERVED

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