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LAN9312 Datasheet(PDF) 368 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 368 Page - SMSC Corporation |
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368 / 458 page ![]() High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet Revision 1.2 (04-08-08) 368 SMSC LAN9312 DATASHEET 14.5.3.2 Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0) This register is used in conjunction with the Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1) and contains the first 32 bits of ALR data to be manually written via the Make Entry command in the Switch Engine ALR Command Register (SWE_ALR_CMD). Register #: 1801h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31:0 MAC Address This field contains the first 32 bits of the ALR entry that will be written into the ALR table. These bits correspond to the first 32 bits of the MAC address. Bit 0 holds the LSB of the first byte (the multicast bit). R/W 00000000h |
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