LAN9312 datasheet(369/458 Pages) SMSC

369 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9312

369

Revision 1.2 (04-08-08)

DATASHEET

14.5.3.3

Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1)

This register is used in conjunction with the Switch Engine ALR Write Data 0 Register

(SWE_ALR_WR_DAT_0) and contains the last 32 bits of ALR data to be manually written via the Make

Entry command in the Switch Engine ALR Command Register (SWE_ALR_CMD).

1802h

Size:

32 bits

BITS

DESCRIPTION

TYPE

DEFAULT

31:25

RESERVED

Valid

When set, this bit makes the entry valid. It can be cleared to invalidate a

previous entry that contained the specified MAC address.

R/W

Age/Override

This bit is used by the aging and forwarding processes.

If the Static bit of this register is cleared, this bit should be set so that the

entry will age in the normal amount of time.

If the Static bit is set, this bit is used as a port state override bit. When set,

packets received with a destination address that matches the MAC address

in the SWE_ALR_WR_DAT_1 and SWE_ALR_WR_DAT_0 registers will be

forwarded regardless of the port state of the ingress or egress port(s). This

is typically used to allow the reception of BPDU packets in the non-

forwarding state.

R/W

Static

When this bit is set, this entry will not be removed by the aging process

and/or be changed by the learning process. When this bit is cleared, this

entry will be automatically removed after 5 to 10 minutes of inactivity.

Inactivity is defined as no packets being received with a source address that

matches this MAC address.

Note:

This bit is normally set when adding manual entries. It must be

cleared when removing an entry (clearing the Valid bit).

R/W

Filter

When set, packets with a destination address that matches this MAC

address will be filtered.

R/W

20:19

Priority

These bits specify the priority that is used for packets with a destination

address that matches this MAC address. This priority is only used if the

Static bit of this register is set, and the DA Highest Priority (bit 5) in the

Switch Engine Global Ingress Configuration Register

(SWE_GLOBAL_INGRSS_CFG) is set.

R/W

00b

LAN9312 Datasheet(PDF) 369 Page - SMSC Corporation

LAN9312 Datasheet(HTML) 369 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL