LAN9312 datasheet(439/458 Pages) SMSC

439 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9312

439

Revision 1.2 (04-08-08)

DATASHEET

14.5.4.27

Buffer Manager Interrupt Pending Register (BM_IPR)

This register contains the Buffer Manager interrupt status. The status is double buffered. All interrupts

in this register may be masked via the Buffer Manager Interrupt Mask Register (BM_IMR) register.

Refer to Chapter 5, "System Interrupts," on page 49 for more information.

1C21h

Size:

32 bits

BITS

DESCRIPTION

TYPE

DEFAULT

31:14

RESERVED

13:10

Drop Reason B

When bit 7 is set, these bits indicate the reason a packet was dropped per

the table below:

9:8

Source Port B

When bit 7 is set, these bits indicate the source port on which the packet

was dropped.

00 = Port 0

01 = Port 1

10 = Port 2

11 = RESERVED

00b

Status B Pending

When set, bits 13:8 are valid.

BIT

VALUES

DESCRIPTION

0000

The destination address was not in the ALR table (unknown or broadcast), and

the Broadcast Buffer Level was exceeded.

0001

Drop on Red was set and the packet was colored Red.

0010

There were no buffers available.

0011

There were no memory descriptors available.

0100

The destination address was not in the ALR table (unknown or broadcast) and

there were no valid destination ports.

0101

The packet had a receive error and was >64 bytes

0110

The Buffer Drop Level was exceeded.

0111

RESERVED

1000

RESERVED

1001

Drop on Yellow was set, the packet was colored Yellow and was randomly

selected to be dropped.

1010

RESERVED

1011

RESERVED

1100

RESERVED

1101

RESERVED

1110

RESERVED

1111

RESERVED

LAN9312 Datasheet(PDF) 439 Page - SMSC Corporation

LAN9312 Datasheet(HTML) 439 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL