CMV8000 datasheet(34/90 Pages) AMSOSRAM

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CMV8000

Functional Description

Preliminary Datasheet

• PUBLIC

DS000609

• v1-00 • 2019-Jun-12

│ 33

Note how bits [8] and [9] have constant values. In 12-bit mode, the control word is expanded to include

[10] and [11] of the control word, but remains the same otherwise.

Figure 31:

Detailed Timing of the Control Channel

Training Pattern

To synchronize each LVDS output coming from the sensor, a known training pattern is presented on

the data channels. This known 10-bit or 12-bit word can be used for bit and word alignment in the

receiving system. The training pattern is put out on all active data channels whenever the sensor is

idle or in between LVAL and DVAL pulses. The sensor has a 12-bit sequencer register where the user

can configure the desired training pattern TP1.

Before each LVAL pulse, the pattern changes to training pattern TP2 for one pixel period. TP2 is

derived from TP1, and has the 8 LSBs inverted, and the 4 (or 2) MSBs set to zero.

The figure below shows the location of when each training pattern can be expected. OUT_X

represents every active data channel.

Frame A

exposure A

FOT

read-out A

Frame B

exposure B

FOT

read-out B

DATA_OUT

Training pattern

data

Training pattern

data

DVAL [0]

LVAL [1]

FVAL [2]

SLOT [3]

ROW [4]

FOT [5]

INT1 [6]

INT2 [7]

[8]

[9]

Frame A FOT

read-out A

Frame B

exposure B

DATA_OUT

112

DVAL [0]

LVAL [1]

FVAL [2]

SLOT [3]

ROW [4]

FOT [5]

INT1 [6]

INT2 [7]

[8]

[9]

CMV8000 Datasheet(PDF) 34 Page - ams-OSRAM AG

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