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CMV8000

Functional Description

Preliminary Datasheet

• PUBLIC

DS000609

• v1-00 • 2019-Jun-12

│ 50

Bit Name

Address

Description

db_dig_gain[4:0]

4: 10-bit mode

1: 12-bit mode

lvds[1]

1:10-bit mode

0: 12-bit mode

div[4:0]

4: 10-bit mode

5: 12-bit mode

v_ramp_res[6:0]

115

70: 10-bit mode

76: 12-bit mode

v_ramp_sig[6:0]

116

70: 10-bit mode

76: 12-bit mode

tune[2:0]

117

0: 10-bit mode

3: 12-bit mode

gate_parallel_clock[0]

123

Set to 1 before adjusting

settings

Attention

Whenever changing bit mode when the sensor is in operation, set register 123[0] to 1 before

adjusting any of the registers above.

7.5.3

Outputs

The sensor has in total 16 LVDS channels that transport pixel data. It is also possible to multiplex the

pixel data to fewer outputs for receiving systems that do not support as many I/Os or for power

sensitive applications.

The number of LVDS data channels can be programmed with the MUX register. Because each row

takes longer to read out in a multiplexed configuration, the ROW_LENGTH register also has to be

adjusted.

Figure 56:

Multiplexing Registers

Bit Name

Address

Description

mux[4:0]

1: 16 outputs

3: 8 outputs

7: 4 outputs

13: 2 outputs

CMV8000 Datasheet(PDF) 51 Page - ams-OSRAM AG

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