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RX72N Datasheet(PDF) 123 Page - Renesas Technology Corp |
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RX72N Datasheet(HTML) 123 Page - Renesas Technology Corp |
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123 / 179 page  R01DS0343EJ0120 Rev.1.20 Page 123 of 179 Nov 15, 2023 RX72N Group 2. Electrical Characteristics Figure 2.49 Output Disable Time for POEG in Response to Detection of the Output Stopping Signal from GPTW Figure 2.50 Output Disable Time for POEG in Response to the Register Setting Figure 2.51 Output Disable Time of POEG in Response to the Oscillation Stop Detection Note 1. GPTWn.GTST.DTEF (dead time error flag), GPTWn.GTST.OABLF (simultaneous low output flag), or GPTWn.GTST.OABHF (simultaneous high output flag) Output stopping signal from GPTW*1 GPTW PWM output pins Outputs disabled tPOEGDE GPTW PWM output pins Outputs disabled tPOEGDS POEGGn.SSF bit (n = A to D) Oscillation stop detection signal (internal signal) GPTW PWM output pins Outputs disabled tPOEGDOS Main clock |
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