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RX72N Datasheet(PDF) 155 Page - Renesas Technology Corp |
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RX72N Datasheet(HTML) 155 Page - Renesas Technology Corp |
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155 / 179 page ![]() R01DS0343EJ0120 Rev.1.20 Page 155 of 179 Nov 15, 2023 RX72N Group 2. Electrical Characteristics 2.4.7.21 CAC Note 1. tPBcyc: PCLKB cycle Note 2. tcac: CAC count clock source cycle Table 2.50 CAC Timing Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V, PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, Ta = Topr, Output load conditions: VOH = 0.5 × VCC, VOL = 0.5 × VCC, C = 30 pF, High-drive output is selected by the drive capacity control register. Item*1, *2 Symbol Min.*1, *2 Max. Unit Test Conditions CAC CACREF input pulse width tPBcyc ≤ tcac tCACREF 4.5 tcac + 3 tPBcyc —ns tPBcyc > tcac 5 tcac + 6.5 tPBcyc — |
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