9DBL0853ANDGI datasheet(8/32 Pages) RENESAS

8 / 32 page

December 9, 2022

9DBL02x3/9DBL04x3/ 9DBL06x3/9DBL08x3 Datasheet

Electrical Characteristics

Table 3. Additive PCIe Phase Jitter (Fan-out Buffer Mode) [a] [b]

Symbol

Parameter

Conditions

Minimum

Typical

Maximum

Industry

Limit

Units

tjphPCIeG1-CC

Additive PCIe Phase

Jitter

(Common Clocked

Architecture)

PCIe Gen1 (2.5 GT/s)

SSC < -0.5%

–

2.6

5.0

(pk-pk)

tjphPCIeG2-CC

PCIe Gen2 Hi Band (5.0 GT/s)

SSC < -0.5%

–

0.357

0.428

3.1

(RMS)

PCIe Gen2 Lo Band (5.0 GT/s)

SSC < -0.5%

–

0.023

0.033

(RMS)

tjphPCIeG3-CC

PCIe Gen3 (8.0 GT/s)

SSC < -0.5%

–

0.091

0.149

(RMS)

tjphPCIeG4-CC

PCIe Gen4 (16.0 GT/s) [c] [d]

SSC < -0.5%

–

0.092

0.156

0.5

(RMS)

tjphPCIeG5-CC

PCIe Gen5 (32.0 GT/s) [c] [e]

SSC < -0.5%

–

0.031

0.059

0.15

(RMS)

tjphPCIeG1-SRIS

Additive PCIe Phase

Jitter

(SRIS Architecture) [f]

PCIe Gen1 (2.5 GT/s)

SSC < -0.3%

–

N/A

(pk-pk)

tjphPCIeG2-SRIS

PCIe Gen2 Band (5.0 GT/s)

SSC < -0.3%

–

0.455

0.524

N/A

(RMS)

tjphPCIeG3-SRIS

PCIe Gen3 (8.0 GT/s)

SSC < -0.3%

–

0.131

0.150

N/A

(RMS)

tjphPCIeG4-SRIS

PCIe Gen4 (16.0 GT/s) [c] [d]

SSC < -0.3%

–

0.111

0.128

N/A

(RMS)

tjphPCIeG5-SRIS

PCIe Gen5 (32.0 GT/s) [c] [e]

SSC < -0.3%

–

0.040

0.045

N/A

(RMS)

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