74HC_HCT595

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 8 — 25 February 2016

4 of 23

NXP Semiconductors

74HC595; 74HCT595

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

6.

Pinning information

6.1 Pinning

6.2 Pin description

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 5.

Pin configuration SO16, SSOP16 and

TSSOP16

Fig 6.

Pin configuration for DHVQFN16

Table 2.

Pin description

Symbol

Pin

Description

Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7

15, 1, 2, 3, 4, 5, 6, 7

parallel data output

GND

8

ground (0 V)

Q7S

9

serial data output

MR

10

master reset (active LOW)

SHCP

11

shift register clock input

STCP

12

storage register clock input

OE

13

output enable input (active LOW)

DS

14

serial data input

Q0

15

parallel data output 0

VCC

16

supply voltage