74LV4053

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 6 — 17 March 2016

14 of 26

NXP Semiconductors

74LV4053

Triple single-pole double-throw analog switch

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 14. Test circuit for measuring switching times

Table 10.

Test data

Supply voltage

Input

Load

VEXT

VCC

VI

tr, tf

CL

RL

tPHL, tPLH

tPZH, tPHZ

tPZL, tPLZ

< 2.7 V

VCC

 6 ns

50 pF

1 k



open

VEE

2VCC

2.7 V to 3.6 V

2.7 V

 6 ns

15 pF, 50 pF

1 k



open

VEE

2VCC

> 3.6 V

VCC

 6 ns

50 pF

1 k



open

VEE

2VCC