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M2006-02A Datasheet(PDF) 5 Page - Integrated Circuit Systems

Part # M2006-02A
Description  VCSO BASED FEC CLOCK PLL
PDF  8 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

M2006-02A Datasheet(HTML) 5 Page - Integrated Circuit Systems

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M2006-02A Datasheet Rev 1.0
5 of 8
Revised 28Jul2004
Integr ated Circuit Systems , Inc. ● Ne tw o r ki ng & C o mmun ica t io ns ● ww w. icst.com ● tel (508 ) 85 2-54 00
M2006-02A
VCSO BASED FEC CLOCK PLL
Prod uct Data Sh eet
Integrated
Circuit
Systems, Inc.
External Loop Filter
To provide stable PLL operation, and thereby a low jitter
output clock, the M2006-02A requires the use of an
external loop filter. This is provided via the provided
filter pins (see Figure 4).
Due to the differential signal path design, the
implementation requires two identical complementary
RC filters as shown here.
Figure 4: External Loop Filter
PLL bandwidth is affected by loop filter component
values, “Mfec” and “Mfin” values, and the “PLL Loop
Constants” listed in AC Characteristics on pg. 7.
The various “Non-FEC ratio” settings can be used to
actively change PLL loop bandwidth in a given
application. See “FEC PLL Ratio Dividers Look-up
Table (LUT)” on pg. 3.
See Example External Loop Filter Component Values table.
PLL Simulator Tool Available
A free PC software utility is available on the ICS website
(www.icst.com). The M2000 Timing Modules PLL
Simulator is a downloadable application that simulates
PLL jitter and wander transfer characteristics. This
enables the user to set appropriate external loop
component values in a given application.
Go to the SAW PLL Simulator Software web page at
www.icst.com/products/calculators/m2000filterSWdesc.htm
C
POST
C
POST
VC
nVC
R
POST
nOP_OUT
OP_OUT
R
POST
R
LOOP
R
LOOP
C
LOOP
C
LOOP
OP_IN
nOP_IN
6
7
5
49
8
Example External Loop Filter Component Values1
VCSO Parameters: KVCO = 800kHz/V, RIN = 50kΩ, VCSO Bandwidth = 700kHz.
Device Configuration
Example External Loop Filter Component Values
Nominal Performance Using These Values
FRef
(MHz)
F
VCSO (MHz) FIN_SEL1:0
pins
FEC_ SEL3:0
pins
R loop
C loop
R post
C post
PLL Loop
Bandwidth
Damping
Factor
Passband
Peaking (dB)
19.44
622.08
0 0
1 1 0 0
11.5
k
Ω
2.2
µF
34
k
Ω
470
pF
1k
Hz
6.0
0.05
77.76
0 1
1 1 1 0
155.52
1 0
1 1 1 1
622.08
1 1
0 1 1 0
5.11
k
Ω
4.7
µF
6.0
0.06
167.3317
1 0
0 0 0 1
113.0
k
Ω
0.22
µF
6.0
0.06
669.3266
1 1
28.0
k
Ω
1.0
µF
6.3
0.05
155.52
669.3266
1 0
1 0 0 1
121.0
k
Ω
0.22
µF
6.0
0.05
622.08
1 1
30.1
k
Ω
1.0
µF
6.5
0.05
Table 8: Example External Loop Filter Component Values
Note 1: K
VCO , VCSO Bandwidth, M Divider Value, and External Loop Filter Component Values determine Loop Bandwidth, Damping Factor, and
Passband Peaking. For PLL Simulator software, go to www.icst.com.
ABSOLUTE MAXIMUM RATINGS1
Symbol Parameter
Rating
Unit
V
I
Inputs
-0.5 to V
CC +0.5
V
V
O
Outputs
-0.5 to V
CC +0.5
V
V
CC
Power Supply Voltage
4.6
V
T
S
Storage Temperature
-45 to +100
oC
Table 9: Absolute Maximum Ratings
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional operation of product at these conditions
or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.



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