TAS5705PAP datasheet(50/71 Pages) TI

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ERROR STATUS REGISTER (0x02)

SYSTEM CONTROL REGISTER 1 (0x03)

TAS5705

SLOS549 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com

Note that the error bits are sticky bits that are not cleared by the hardware. This means that the software must

clear the register (write zeroes) and then read them to determine if there are any persistent errors.

Table 10. Error Status Register (0x02)

FUNCTION

–

PLL autolock error

–

SCLK error

–

LRCLK error

–

Frame slip

No errors (1)

(1)

Default values are in bold.

System control register 1 has several functions:

Bit D7:

If 0, the dc-blocking filter for each channel is disabled.

If 1, the dc-blocking filter (–3 dB cutoff <1 Hz) for each channel is enabled (default).

Bit D5:

If 0, use soft unmute on recovery from clock error. This is a slow recovery.

If 1, use hard unmute on recovery from clock error (default). This is a fast recovery.

Bit D3:

If 0, clock autodetect is enabled (default).

If 1, clock autodetect is disabled.

Bit D2:

If 0, soft start is enabled (default).

If 1, soft start is disabled.

Bits D1–D0: Select de-emphasis

Table 11. System Control Register 1 (0x03)

FUNCTION

–

PWM high-pass (dc blocking) disabled

–

PWM high-pass (dc blocking) enabled (1)

–

Reserved (1)

–

Soft unmute on recovery from clock error

–

Hard unmute on recovery from clock error (1)

–

Reserved (1)

–

Enable clock autodetect (1)

–

Disable clock autodetect

–

Enable soft start (1)

–

Disable soft start

–

No de-emphasis (1)

–

Reserved

–

De-emphasis for fS = 44.1 kHz

–

De-emphasis for fS = 48 kHz

(1)

Default values are in bold.

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