TPS720 datasheet(12/19 Pages) TI

12 / 19 page

UNDERVOLTAGE LOCK-OUT (UVLO)

POWER DISSIPATION

THERMAL INFORMATION

PACKAGE MOUNTING

TPS720xx

SBVS100A – JUNE 2008 – REVISED JUNE 2008 ............................................................................................................................................................. www.ti.com

The internal protection circuitry of the TPS720xx has

been designed to protect against overload conditions.

The TPS720xx uses an undervoltage lock-out circuit

It was not intended to replace proper heatsinking.

to keep the output shut off until the internal circuitry is

Continuously running the TPS720xx into thermal

operating properly. The UVLO circuit has a deglitch

shutdown degrades device reliability.

feature

that

typically

ignores

undershoot

transients on the input if they are less than 50

µs

duration.

The ability to remove heat from the die is different for

each

package

type,

presenting

different

considerations in the printed circuit board (PCB)

Thermal protection disables the output when the

layout. The PCB area around the device that is free

junction temperature rises to approximately +160°C,

of other components moves the heat from the device

allowing the device to cool. When the junction

to the ambient air. Performance data for JEDEC low-

temperature cools to approximately +140°C, the

and high-K boards are given in the Dissipation

output circuitry is again enabled. Depending on power

Ratings table. Using heavier copper increases the

dissipation,

thermal

resistance,

and

ambient

effectiveness in removing heat from the device. The

temperature, the thermal protection circuit may cycle

addition of plated through-holes to heat-dissipating

on and off. This cycling limits the dissipation of the

layers also improves the heatsink effectiveness.

regulator, protecting it from damage as a result of

overheating.

Power dissipation depends on input voltage and load

conditions. Power dissipation (PD) is equal to the

Any tendency to activate the thermal protection circuit

product of the output current times the voltage drop

indicates

excessive

power

dissipation

across the output pass element (VIN to VOUT), as

inadequate heatsink. For reliable operation, junction

shown in Equation 2:

temperature should be limited to +125°C maximum.

PD = (VIN – VOUT) × IOUT

(2)

To estimate the margin of safety in a complete design

(including

heatsink),

increase

the

ambient

temperature until the thermal protection is triggered;

use worst-case loads and signal conditions. For good

Solder

pad

footprint

recommendations

for

the

reliability, thermal protection should trigger at least

TPS720xx are available from the Texas Instruments

+35°C

above

the

maximum

expected

ambient

web site at www.ti.com.

condition

the

particular

application.

This

configuration

produces

worst-case

junction

temperature of +125°C at the highest expected

ambient temperature and worst-case load.

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