AD5751

Preliminary Technical Data

Rev. PrA | Page 16 of 22

0

1

0

1

0

0-12.0V (20% over range)

0

1

0

1

1

N/A. If selected output will drive 0V.

0

1

1

0

0

N/A. If selected output will drive 0V.

0

1

1

0

1

N/A. If selected output will drive 0V.

0

1

1

1

0

0-40V

0

1

1

1

1

0-48V

1

0

0

0

0

4-20MA

Internal Current Sense Resistor.

1

0

0

0

1

0-20MA

Internal Current Sense Resistor.

1

0

0

1

0

0-24MA

Internal Current Sense Resistor.

1

0

0

1

1

N/A. Output will revert to CLEAR condition.

1

0

1

0

0

N/A. Output will revert to CLEAR condition.

1

0

1

0

1

0-5V

1

0

1

1

0

0-10V

1

0

1

1

1

N/A. If selected output will drive 0V.

1

1

0

0

0

N/A. If selected output will drive 0V.

1

1

0

0

1

0-6.0V (20% over range)

1

1

0

1

0

0-12.0V (20% over range)

1

1

0

1

1

N/A. If selected output will drive 0V.

1

1

1

0

0

N/A. If selected output will drive 0V.

1

1

1

0

1

3.92ma – 20.4ma

Internal Current Sense Resistor.

1

1

1

1

0

0ma – 20.4ma

Internal Current Sense Resistor.

1

1

1

1

1

0ma – 24.5ma

Internal Current Sense Resistor.

Reset

Resets the part to its Power on State

Readback Operation

Readback mode is invoked by selecting the correct device address (A2,A1,A0) and then setting the R/W bit to 1. By default the SDO pin is

disabled, after having addressed the AD5751 for a read operation, setting R/W to 1 will enable the SDO pin and SDO data will be clocked

pin once again. STATUS and CONTROL register data will be both available during the same read cycle. See Table 7 below.

Table 7. Input Shift Register Contents for a read operation

MSB

LSB

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

A2

A1

A0

1

0

R3

R2

R1

R0

CLRSEL

OUTEN

RSEL

PEC Error Bit

OVER TEMP

IOUT Fault

Vout Fault

The STATUS bits are 5 read only bits. They are used to notify the user of specific fault conditions that have arisen, such as open or short

circuit on the output, over temperature, interface error or a range error. If any one of these fault conditions are set then a general fault

error bit is set (bit D5). This bit also sets a FAULT pin which can be used as a hardware interrupt to the controller.

Full explanation of fault conditions are given in the Features sections.

Table 9. STATUS Bits Options

Option

Description

PEC ERROR

Bit Set if there is an Interface Error detected by CRC-8 Error Checking. See features section.

VOUT FAULT

Bit set if there is a short Circuit on VOUT pin.

IOUT FAULT

Bit set is there is an open circuit on IOUT pin.

OVER TEMP

This bit will be set if the AD5750 core temperature exceeds approx. 150°C.