TPIC2302

3CHANNEL COMMONSOURCE POWER DMOS ARRAY

SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995

POST OFFICE BOX 655303

POST OFFICE BOX 1443

77251−1443

3

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

td(on)

Turn-on delay time

21

42

td(off)

Turn-off delay time

VDD = 25 V,

RL = 50 Ω,

tr1 = 10 ns,

20

40

ns

tr2

Rise time

VDD = 25 V,

tf1 = 10 ns,

RL = 50 Ω,

See Figure 2

tr1 = 10 ns,

5

10

ns

tf2

Fall time

tf1 = 10 ns,

See Figure 2

13

26

Qg

Total gate charge

VDS = 48 V,

ID = 0.5 A,

VGS = 10 V,

3.1

3.8

Qgs(th) Threshold gate-to-source charge

VDS = 48 V,

See Figure 3

ID = 0.5 A,

VGS = 10 V,

0.4

0.5

nC

Qgd

Gate-to-drain charge

See Figure 3

1.3

1.6

nC

LD

Internal drain inductance

5

nH

LS

Internal source inductance

5

nH

Rg

Internal gate resistance

0.25

Ω

thermal resistance

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RθJA

Junction-to-ambient thermal resistance

All outputs with equal power,

See Note 4

130

°C/W

RθJP

Junction-to-pin thermal resistance

All outputs with equal power,

See Note 4

44

°C/W

NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink

PARAMETER MEASUREMENT INFORMATION

IRM†

Reverse di/dt = 100 A/

µs

trr(SD)

† IRM = maximum recovery current

TJ = 25°C

1

0.5

0

− 0.5

− 1

− 1.5

− 2

− 2.5

1.5

Time − ns

0

25

50

75

100

125

150

175

200

225

250

25% of IRM†

Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode