33910 datasheet(39/44 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33910

FUNCTIONAL DEVICE OPERATIONS

LOGIC COMMANDS AND REGISTERS

Interrupt Mask Register - IMR

This register allow to mask some of interrupt sources. The

respective flags within the ISR will continue to work but will

not generate interrupts to the MCU. The 5V Regulator over-

temperature prewarning interrupt and under-voltage (VSUV)

interrupts can not be masked and will always cause an

interrupt.

Writing to the interrupt mask register (IMR) will return the

ISR.

HSM - High Side Interrupt Mask

This write-only bit enables/disables interrupts generated in

the high side block.

1 = HS Interrupts Enabled

0 = HS Interrupts Disabled

LINM - LIN Interrupts Mask

This write-only bit enables/disables interrupts generated in

the LIN block.

1 = LIN Interrupts Enabled

0 = LIN Interrupts Disabled

VMM - Voltage Monitor Interrupt Mask

This write-only bit enables/disables interrupts generated in

the voltage monitor block. The only maskable interrupt in the

voltage monitor block is the VSUP over-voltage interrupt.

1 = Interrupts Enabled

0 = Interrupts Disabled

Interrupt Source Register - ISR

This register allows the MCU to determine the source of

the last interrupt or wake-up respectively. A read of the

high, in case there are no other pending interrupts. If there

are pending interrupts, IRQ will be driven high for 10µs and

then be driven low again.

This register is also returned when writing to the interrupt

mask register (IMR).

ISRx - Interrupt Source Register

These read-only bits indicate the interrupt source following

Table 28. If no interrupt is pending than all bits are 0.

In case more than one interrupt is pending, than the

interrupt sources are handled sequentially multiplex.

Table 28. Interrupt Sources

Table 26. Interrupt Mask Register - $E

Write

HSM

LINM

VMM

Reset

Value

1111

Reset

Condition

POR

Table 27. Interrupt Source Register - $E/$F

Read

ISR3

ISR2

ISR1

ISR0

Interrupt Source

Priority

ISR3

ISR2

ISR1

ISR0

none maskable

maskable

no interrupt

none

L1 wake-up from Stop Mode-

highest

HS interrupt (Over-temperature)

Reserved

LIN interrupt (RXSHORT, TXDOM, LIN OT, LIN

OC) or LIN wake-up

Voltage monitor interrupt

(Low-voltage and VDD over-temperature)

Voltage monitor interrupt

(High-voltage)

Forced wake-up

lowest

33910 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

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