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33911 Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc

Part # 33911
Description  LIN System Basis Chip with DC Motor Pre-driver
PDF  45 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33911 Datasheet(HTML) 31 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
31
33911
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
short to VBAT), the transmitter will not be shut down. The bit
LINOC in the LIN Status Register (LINSR) is set.
If the LINM bit is set in the Interrupt Mask Register (IMR)
an Interrupt IRQ will be generated.
Over-temperature Shutdown (LIN Interrupt)
The output low side FET is protected against over-
temperature conditions. If an over-temperature condition
occurs, the transmitter will be shut down and the LINOT bit in
the LINSR is set.
If the LINM bit is set in the IMR an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once the
condition is gone and TXD is high.
A read of the LINSR with the TXD pin high will re-enable
the transmitter.
RXD Short-circuit Detection (LIN Interrupt)
The LIN transceiver has a short-circuit detection for the
RXD output pin. In case of a short-circuit condition, either 5V
or Ground, the RXSHORT bit in the LINSR is set and the
transmitter is shutdown.
If the LINM bit is set in the IMR an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once the
condition is gone (transition on RXD) and TXD is high.
A read of the LINSR without the RXD pin short-circuit
condition will clear the RXSHORT bit.
TXD Dominant Detection (LIN Interrupt)
The LIN transceiver monitors the TXD input pin to detect
stuck-in-dominant (0V) condition. If a stuck condition occurs
(TXD pin 0V for more than 1 second (typ.), the transmitter is
shut down and the TXDOM bit in the LINSR is set.
If the bit LINM is set in the IMR an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once TXD is
high.
A read of the LINSR with the TXD pin is high will clear the
bit TXDOM.
LIN Dominant Voltage Level Selection
The LIN dominant voltage level can be selected by the
LDVS bit in the LIN Control Register (LINCR).
LIN Receiver Operation Only
While in Normal Mode, the activation of the RXONLY bit
disables the LIN TXD driver. If a LIN error condition occurs,
this bit is automatically set. Ifa low-power mode is selected
with this bit set, the LIN wake-up functionality is disabled.
Then in STOP mode, the RXD pin will reflect the state of the
LIN bus.
STOP Mode And Wake-up Feature
During Stop Mode operation, the transmitter of the
physical layer is disabled. If the LIN-PU bit was set in the Stop
Mode sequence, the internal pull-up resistor is disconnected
from VSUP and a small current source keeps the LIN pin in
the recessive state. The receiver is still active and able to
detect wake-up events on the LIN bus line.
A dominant level longer than tPROPWL followed by a rising
edge will generate a wake-up interrupt and will be reported in
the Interrupt Source Register (ISR). Also see Figure 11,
page 18.
SLEEP Mode And Wake-Up Feature
During Sleep Mode operation, the transmitter of the
physical layer is disabled. If the LIN-PU bit was set in the
Sleep Mode sequence, the internal pull-up resistor is
disconnected from VSUP and a small current source keeps
the LIN pin in recessive state. The receiver must still active to
detect wake-up events on the LIN bus line.
A dominant level longer than tPROPWL followed by a rising
edge will generate a system wake-up (Reset), and will be
reported in the ISR. Also see Figure 10, page 18.



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