32C8A datasheet(21/67 Pages) RENESAS

21 / 67 page

M32C/8A Group

Rev.1.10

Jul 15, 2007

Page 21 of 65

Memory

Figure 3.1 is a memory map of the M32C/8A Group.

The M32C/8A Group has 16-Mbyte address space from addresses 000000h to FFFFFFh.

The fixed interrupt vectors are allocated addresses FFFFDCh to FFFFFFh. They store the starting address of each

interrupt routine.

The internal RAM is allocated higher addresses, beginning with address 000400h. For example, a 12-Kbyte internal

RAM area is allocated addresses 000400h to 0033FFh. The internal RAM is used not only for storing data but for the

stacks when subroutines are called or when interrupt requests are acknowledged.

SFRs are allocated address 000000h to 0003FFh. The peripheral function control registers such as for I/O ports, A/D

converters, serial interfaces, timers are allocated here. All blank spaces within SFRs are reserved and cannot be

accessed by users.

The special page vectors are allocated addresses FFFE00h to FFFFDBh. They are used for the JMPS instruction and

JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.

Figure 3.1

Memory Map

NOTE:

1. The watchdog timer interrupt, oscillation stop detection interrupt , and Vdet4 detection interrupt use the same vector.

FFFFFFh

Special page

vector table

FFFFDCh

FFFE00h

Reset

Address match

BRK instruction

Overflow

Undefined instruction

NMI

Watchdog timer(1)

000000h

SFR

Internal RAM

Reserved

External Space

000400h

XXXXXXh

010000h

FFFFFFh

Internal RAM

XXXXXXh

0033FFh

Capacity

12 Kbytes

0063FFh

24 Kbytes

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