7630 datasheet(29/49 Pages) RENESAS

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MITSUBISHI MICROCOMPUTERS

7630 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Fig. 27

Structure of UART mode register

Fig. 28

Structure of UART control register

Not used (“0” when read, do not write “1”)

clock divider selection bits

b2 b1

0 0 :

φ divided by 1

0 1 :

φ divided by 8

1 0 :

φ divided by 32

1 1 :

φ divided by 256

Stop bits selection bit

0 : One stop bit

1 : Two stop bits

Parity selection bit

0 : Even parity

1 : Odd parity

Parity enable bit

0 : Parity disabled

1 : Parity enabled

UART word length selection bits

b7 b6

0 0 : 7 bits

0 1 : 8 bits

1 0 : 9 bits

1 1 : Not used

UART mode register

UMOD (address 002016)

Transmit enable bit

0 : Transmit disabled (an ongoing transmission will be finished correctly)

1 : Transmit enabled

Receive enable bit

0 : Receive disabled (an ongoing reception will be finished correctly)

1 : Receive enabled

Transmission initialization bit

0 : No action

1 : Clear transmit buffer full flag and transmit shifter full flag, set the

transmit status register bits and stop transmission

Receive initialization bit

0 : No action

1 : Clear receive status flags and the receive enable bit

Not used (“0” when read, do not write “1”)

UART control register

UCON (address 002216)

7630 Datasheet(PDF) 29 Page - Renesas Technology Corp

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