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M32C83T Datasheet(PDF) 283 Page - Renesas Technology Corp

Part # M32C83T
Description  16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  527 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C83T Datasheet(HTML) 283 Page - Renesas Technology Corp

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Page 260
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21. Intelligent I/O
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Figure 21.12 G2POCR0 to G2POCR7 and G3POCR0 to G3POCR7 Registers
Group i Waveform Generation Control Register j (i=2 to 3; j=0 to 7)
Symbol
Address
After Reset
G2POCR0 to G2POCR3
015016, 015116, 015216, 015316
0016
G2POCR4 to G2POCR7
015416, 015516, 015616, 015716
0016
G3POCR0 to G3POCR3
019016, 019116, 019216, 019316
0016
G3POCR4 to G2POCR7
019416, 019516, 019616, 019716
0016
RW
RW
RW
RW
RW
RW
RW
RW
RW
Bit Name
Function
Bit
Symbol
MOD0
MOD1
MOD2
Operation Mode
Select Bit(5)
Output Initial Value
Select Bit
IVL
RLD
INV
0: Outputs "L" as default value
1: Outputs "H" as default value
Parallel Real-time Port
Output Trigger
Select Bit(4)
PRT
Inverse Output Function
Select Bit(3)
b1
0
0
1
1
0
0
1
1
b0
0
1
0
1
0
1
0
1
: Single waveform output mode
: SR waveform output mode(1)
: Inverse waveform output mode
: Do not set to this value
: Bit-modulation PWM mode
: Do not set to this value
: Do not set to this value
: Use a communication function
output(2)
0: Output is not inversed
1: Output is inversed
RTP
Real-time Port Function
Select Bit
0: Not used
1: Used (RTP output mode or parallel
RTP output mode)
b2
0
0
0
0
1
1
1
1
GiPOj Register Value
Reload Timing
Select Bit
NOTES:
1. This setting is valid only for even channels. In SR waveform output mode, values written to the
corresponding odd channel (next channel after an even channel) are ignored. Even channels output
waveforms. Odd channels output no waveforms.
2. This setting is valid only for channels 0 and 1 in the groups 2 and 3. To use ISTxD2 or IEOUT, set the
MOD2 to MOD0 bits in the G2POCR0 register to "1112". To use ISCLK2 for an output, set the MOD2
to MOD0 bits in the G2POCR1 register to "1112". Do not set the MOD2 to MOD0 bits to "1112" except
in the channels 0 and 1.
To use ISTxD3, set the MOD2 to MOD0 bits in the G3POCR0 register to "1112". To use ISCLK3 for an
output, set the MOD2 to MOD0 bits in the G3POCR1 register to"1112". Do not set the MOD2 to
MOD0 bits to "1112" except in the channels 0 and 1.
3. The inverse output function is the final step in the waveform generation process. If the INV bit is set to
"1" (output inversed), the output signal is "H" when the IVL bit is set to "0" (outputs "L" as an initial
value) and "L" when the IVL bit is set to "1" (outputs "H" as an initial value).
4. The PRT bit is valid when the RTP bit is set to "1" (real-time port function used) and the PRP bit in the
GiBCR1 register is set to "1" (parallel RTP output mode).
5. When the RTP bit is set to "1", the value written to the MOD2 to MOD0 bits is ignored.
0: Not triggered by matching the base
timer with the GiPO0 to GiPO7 registers
1: Triggered by matching the base timer
with the GiPO0 to GiPO7 registers
0: Reloads the GiPOj register when
counter is written to
1: Reloads the GiPOj register when
the base timer is reset
b7
b6
b5
b4
b3
b2
b1
b0



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