M32C83T datasheet(280/527 Pages) RENESAS

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Page 257

21. Intelligent I/O

)

(

Base Timer Start Register(1, 2)

Symbol

Address

After Reset

BTSR

016416

XXXX 00002

Bit Name

Function

Bit

Symbol

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

BT0S

BT1S

BT2S

Group 0 Base Timer

Start Bit

BT3S

(b7 - b4)

0 : Base timer reset

1 : Base timer starts counting

0 : Base timer reset

1 : Base timer starts counting

0 : Base timer reset

1 : Base timer starts counting

0 : Base timer reset

1 : Base timer starts counting

Group 1 Base Timer

Start Bit

Group 2 Base Timer

Start Bit

Group 3 Base Timer

Start Bit

NOTES:

1. Set registers as follows before using the intelligent I/O:

(1) Set the G2BCR0 register to supply the clock to the group 2 base timer

(2) Set all BT0S to BT3S bits in the BTSR register to "0" (base timer reset)

(3) Set other registers associated with the intelligent I/O

The BTiS bit (i=0 to 3) allows the base timers in multiple groups to start counting simultaneously.

When starting the base timers separately, set the BTiS bit to "0" before setting the BTS bit in the

GiBCR1 register.

2. Use the following procedure to start base timers in multiple groups simultaneously (including groups

1 and 2 cascaded connections). This procedure is not required when starting the base timers

individually.

• Set the BCK1 to BCK0 bits and DIV4 to DIV0 bits in the GiBCR0 register (i=0 to 3) of the groups to

be started simultaneously, to the same value.

• After the BCK1 to BCK0 bits or DIV4 to DIV0 bits are changed, use the following procedure to

start the base timer twice.

(1) Set the BTiS bit in the BTSR register to "1" (base timer starts counting).

(2) Set the BTiS bit to "0" (base timer stops counting) after one fBTi clock cycle.

(3) After waiting at least one additional fBTi clock cycle, set the BTiS bit to "1" (base timer starts

counting).

Figure 21.9 BTSR Register

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