M32C83T datasheet(317/527 Pages) RENESAS

317 / 527 page

Page 294

21. Intelligent I/O (Group 0, 1 Communication Function)

)

(

Figure 21.37 G0IRF to G1IRF Registers and G0TB to G1TB Registers

Group i SI/O Special Communication Interrupt Detect Register (i=0,1)(1,2)

Symbol

Address

After Reset

G0IRF,G1IRF

00FE16, 013E16

0000 00XX2

Bit Name

Function

Bit

Symbol

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

NOTES:

1. The GiETC register is used in special communication mode or HDLC data processing mode. Do not

use in clock synchronous serial I/O mode or UART mode.

2. The SRTiR bit in the IIO4IR register is set to "1" if the BSERR bit, ABT bit or the IRF0 to IRF3 bits is

set to "0".

ABT

BSERR

Arbitration Lost

Detect Flag

Bit Stuffing Error

Detect Flag

0 : Not detected

1 : Detected

0 : Not detected

1 : Detected

IRF0

IRF1

IRF2

Interrupt Cause

Determination

Flag 0(2)

IRF3

Interrupt Cause

Determination

Flag 1(2)

Interrupt Cause

Determination

Flag 2(2)

Interrupt Cause

Determination

Flag 3(2)

0 : The GiDR register (receive data register)

does not match the GiCMP0 register

1 : The GiDR register matches the GiCMP0

0 : The GiDR register (receive data register)

does not match the GiCMP1 register

1 : The GiDR register matches the GiCMP1

0 : The GiDR register (receive data register)

does not match the GiCMP2 register

1 : The GiDR register matches the GiCMP2

0 : The GiDR register (receive data register)

does not match the GiCMP3 register

1 : The GiDR register matches the GiCMP3

(b1 - b0)

Group i Transmit Buffer (Receive Data) Register (i=0,1)(1)

Symbol

Address

After Reset

G0TB,G0DR

00EA16

Indeterminate

G1TB,G1DR

012A16

Indeterminate

(RO)

Function

Set data to be transmitted.

Values written in these registers are written to the GiTB register.

Data read from these registers in HDLC data processing mode are

values written in the GiDR register

NOTES:

1. The GiTB register and the GiDR register share addresses.

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