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M32C83T Datasheet(PDF) 321 Page - Renesas Technology Corp

Part # M32C83T
Description  16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  527 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C83T Datasheet(HTML) 321 Page - Renesas Technology Corp

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Page 298
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21. Intelligent I/O (Group 0, 1 Communication Function)
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Table 21. 20 Pin Settings (3)
Port
Function
Bit and Setting
Register(1)
Name
PS5 Register PD11 Register IPS Register
P110
ISTxD1 output
PS5_0 = 1
-
-
G1POCR0
P111
ISCLK1 input
PS5_1 = 0
PD11_1 = 0
IPS1 = 1
-
ISCLK1 output
PS5_1 = 1
-
-
G1POCR1
P112
ISRxD1 input
PS5_2 = 0
PD11_2 = 0
IPS1 = 1
-
NOTES:
1. Set the MOD2 to MOD0 bits in the corresponding register to "1112" (output of the communication
function used).
Table 21. 21 Pin Settings (4)
Port
Function
Bit and Setting
Register(1)
Name
PS9 Register PD15 Register IPS Register
P150
ISTxD0 output
PS9_0 = 1
-
-
G0POCR0
P151
ISCLK0 input
PS9_1 = 0
PD15_2 = 0
IPS0 = 1
-
ISCLK0 output
PS9_1 = 1
-
-
G0POCR1
P152
ISRxD0 input
PS9_2 = 0
PD15_2 = 0
IPS0 = 1
-
NOTES:
1. Set the MOD2 to MOD0 bits in the corresponding register to "1112" (output of the communication
function used).
n+2
m
Base timer i
The base timer is reset by the channel 0
waveform generation function
ISRxDi pin input
(received data)
ISTxDi pin output
(data to be transmitted)
ISCLKi pin output
(transmit clock in the
channel 3 generation
function)
SIOiTR bit
when IRS=0
(no data in the
transmit buffer)
SIOiTR bit
when IRS=1
(transmission completed)
Write to the GiTB register
The above applies under the following conditions:
• The CKDIR bit in the GiMR register is set to "0" (internal clock)
• The UFORM bit in the GiMR register is be set to "0" (LSB first)
• The IPOL and OPOL bits in the GiCR register are set to "0" (no inverse)
n : Setting value of the GiPO0 register
m : Setting value of the GiPO3 register
i
: 0,1
SIOiTR bit : Bit in the IIOjIR register (j = 1,3)
SIOiRR bit : Bit in the IIOkIR register (k = 0,2)
IRS bit
: Bit in the GiMR register
Bit 1
Bit 2
Bit 6
Bit 0
Bit 7
Bit 1
Bit 2
Bit 6
Bit 0
Bit7
SIOiRR bit
Write "0" by program if setting to "0"
Write "0" by program
if setting to "0"
Write "0" by program
if setting to "0"
Figure 21.39 Transmit and Receive Operation



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