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M32C83T Datasheet(PDF) 329 Page - Renesas Technology Corp

Part # M32C83T
Description  16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  527 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C83T Datasheet(HTML) 329 Page - Renesas Technology Corp

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21. Intelligent I/O (Group 0, 1 Communication Function)
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21.5 Group 2 Communication Function
The communication function is available when two 8-bit shift registers are used with the waveform genera-
tion function.
In the intelligent I/O group 2, the variable clock synchronous serial I/O or IEBus(1) communication function
is available. Figures 21.42 to 21.45 show registers associated with the communication function.
NOTES:
1. IEBus is a trademark of NEC Electronics Corporation.
Function
Group 2 SI/O Transmit Buffer Register
Bit Name
Bit
Symbol
Symbol
Address
After Reset
G2TB
016D16-016C16
Indeterminate
RW
RO
RW
RW
RW
RW
RW
RW
SZ0
(b7 - b0)
(b12 - b11)
SZ2
SZ1
b7
b0
b15
b8
Transfer Bit Length
Select Bit
Transmit Buffer
Data to be transmitted
b9
0
0
1
1
0
0
1
1
b8
0
1
0
1
0
1
0
1
: 8 bits long
: 1 bits long
: 2 bits long
: 3 bits long
: 4 bits long
: 5 bits long
: 6 bits long
: 7 bits long
b10
0
0
0
0
1
1
1
1
A
PC
P
ACK Function
Select Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Parity Calculation
Continuing Bit(1)
Parity Function
Select Bit
0 : Adds no ACK bit
1 : Adds the ACK bit after last transmit bit
0 : Adds the parity bit after a data to be
transmitted
1 : Carries over a parity to a data to be
transmitted
0 : No parity
1 : Parity (even parity only)
NOTES:
1. Set the P bit to "0" before setting the PC bit to "1"
Function
Group 2 SI/O Receive Buffer Register
Bit Name
Bit
Symbol
Symbol
Address
After Reset
G2RB
016F16 - 016E16
Indeterminate
RW
RO
RO
Received data
OER
(b7 - b0)
(b11 - b8)
(b15 - b13)
0 : No overrun error
1 : Overrun error found
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Receive Buffer
Overrun Error Flag(1)
NOTES:
1. The OER bit is set to "0" when the GMD1 to GMD0 bits in the G2MR register are set to "002"
(communication unit reset) or the RE bit in the G2CR register is set to "0" (receive disable).
b7
b0
b15
b8
Figure 21.42 G2TB and G2RB Register



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