SH7606 datasheet(55/532 Pages) RENESAS

55 / 532 page

Section 2 CPU

Rev. 4.00 Sep. 13, 2007 Page 29 of 502

REJ09B0239-0400

Addressing

Mode

Instruction

Format

Effective Address Calculation Method

Calculation

Formula

indirect with

pre-decrement

@–Rn

Effective address is register Rn contents,

decremented by a constant beforehand: 1 for a

byte operand, 2 for a word operand, 4 for a

longword operand.

Rn - 1/2/4

1/2/4

Rn - 1/2/4

Byte: Rn – 1

→

Word: Rn – 2

→

Longword: Rn – 4

→ Rn

(Instruction

executed with Rn

after calculation)

indirect with

displacement

@(disp:4,

Rn)

Effective address is register Rn contents with

4-bit displacement disp added. After disp is

zero-extended, it is multiplied by 1 (byte), 2

(word), or 4 (longword), according to the

operand size.

1/2/4

disp

(zero-extended)

+ disp

× 1/2/4

Byte: Rn + disp

Word: Rn + disp

Longword: Rn +

disp

× 4

Index

@(R0, Rn) Effective address is sum of register Rn and R0

contents.

+ R0

Rn + R0

GBR indirect

with

displacement

@(disp:8,

GBR)

Effective address is register GBR contents with

8-bit displacement disp added. After disp is

zero-extended, it is multiplied by 1 (byte), 2

(word), or 4 (longword), according to the

operand size.

GBR

1/2/4

disp

(zero-extended)

GBR

+ disp

× 1/2/4

Byte: GBR + disp

Word: GBR + disp

× 2

Longword: GBR +

disp

× 4

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