SH7052 datasheet(732/919 Pages) RENESAS

732 / 919 page

706

Automatic SCI Bit Rate Adjustment

Start

bit

Stop

bit

Low period (9 bits) measured (H'00 data)

High period

(1 or more bits)

Figure 20.10 Automatic SCI Bit Rate Ajustment

When boot mode is initiated, the SH7052F/SH7053F measures the low period of the asynchronous

SCI communication data (H'00) transmitted continuously from the host. The SCI transmit/receive

format should be set as follows: 8-bit data, 1 stop bit, no parity. The SH7052F/SH7053F calculates

the bit rate of the transmission from the host from the measured low period, and transmits one

H'00 byte to the host to indicate the end of bit rate adjustment. The host should confirm that this

adjustment end indication (H'00) has been received normally, and transmit one H'55 byte to the

SH7052F/SH7053F. If reception cannot be performed normally, initiate boot mode again (reset),

and repeat the above operations. Depending on the host’s transmission bit rate and the

SH7052F/SH7053F’s system clock frequency, there will be a discrepancy between the bit rates of

the host and the SH7052F/SH7053F. Set the host transfer bit rate at 9,600 or 19,200 bps to operate

the SCI properly.

Table 20.7 shows host transfer bit rates and system clock frequencies for which automatic

adjustment of the SH7052F/SH7053F bit rate is possible. The boot program should be executed

within this system clock range.

Table 20.7

System Clock Frequencies for which Automatic Adjustment of

SH7052F/SH7053F Bit Rate is Possible

Host Bit Rate

System Clock Frequency for Which Automatic Adjustment

of SH7052F/SH7053F Bit Rate is Possible

9,600 bps

20 to 40 MHz (input frequency: 5 to 10 MHz)

19,200 bps

20 to 40 MHz (input frequency: 5 to 10 MHz)

SH7052 Datasheet(PDF) 732 Page - Renesas Technology Corp