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SH7052 Datasheet(PDF) 16 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 16 Page - Renesas Technology Corp |
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16 / 919 page ![]() vi 10.3.4 Input Capture Function......................................................................................... 342 10.3.5 One-Shot Pulse Function...................................................................................... 343 10.3.6 Offset One-Shot Pulse Function and Output Cutoff Function ............................. 344 10.3.7 Interval Timer Operation...................................................................................... 345 10.3.8 Twin-Capture Function ........................................................................................ 346 10.3.9 PWM Timer Function .......................................................................................... 347 10.3.10 Channel 3 to 5 PWM Function ............................................................................. 349 10.3.11 Event Count Function and Event Cycle Measurement......................................... 350 10.3.12 Channel 10 Functions ........................................................................................... 352 10.4 Interrupts............................................................................................................................ 360 10.4.1 Status Flag Setting Timing ................................................................................... 360 10.4.2 Status Flag Clearing ............................................................................................. 365 10.5 CPU Interface .................................................................................................................... 367 10.5.1 Registers Requiring 32-Bit Access ...................................................................... 367 10.5.2 Registers Permitting 8-Bit, 16-Bit, or 32-Bit Access ........................................... 369 10.5.3 Registers Requiring 16-Bit Access ...................................................................... 370 10.5.4 8-Bit or 16-Bit Accessible Registers .................................................................... 371 10.5.5 Registers Requiring 8-Bit Access ........................................................................ 372 10.6 Sample Setup Procedures .................................................................................................. 372 10.7 Usage Notes ....................................................................................................................... 387 10.8 ATU-II Registers And Pins ............................................................................................... 400 Section 11 Advanced Pulse Controller (APC) ............................................................ 403 11.1 Overview............................................................................................................................ 403 11.1.1 Features ................................................................................................................ 403 11.1.2 Block Diagram...................................................................................................... 404 11.1.3 Pin Configuration ................................................................................................. 405 11.1.4 Register Configuration ......................................................................................... 405 11.2 Register Descriptions......................................................................................................... 406 11.2.1 Pulse Output Port Control Register (POPCR)...................................................... 406 11.3 Operation ........................................................................................................................... 407 11.3.1 Overview .............................................................................................................. 407 11.3.2 Advanced Pulse Controller Output Operation...................................................... 408 11.4 Usage Notes ....................................................................................................................... 411 Section 12 Watchdog Timer (WDT).............................................................................. 413 12.1 Overview............................................................................................................................ 413 12.1.1 Features ................................................................................................................ 413 12.1.2 Block Diagram...................................................................................................... 414 12.1.3 Pin Configuration ................................................................................................. 414 12.1.4 Register Configuration ......................................................................................... 415 12.2 Register Descriptions......................................................................................................... 415 12.2.1 Timer Counter (TCNT) ........................................................................................ 415 |
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