SH7052 datasheet(78/919 Pages) RENESAS

78 / 919 page

Reset State: The CPU resets in the reset state. When the

RES pin level goes low, a power-on reset

results. When the

RES pin is high and MRES is low, a manual reset will occur.

Exception Processing State: The exception processing state is a transient state that occurs when

exception processing sources such as resets or interrupts alter the CPU’s processing state flow.

For a reset, the initial values of the program counter (PC) (execution start address) and stack

pointer (SP) are fetched from the exception processing vector table and stored; the CPU then

branches to the execution start address and execution of the program begins.

For an interrupt, the stack pointer (SP) is accessed and the program counter (PC) and status

from the exception processing vector table; the CPU then branches to that address and the program

starts executing, thereby entering the program execution state.

Program Execution State: In the program execution state, the CPU sequentially executes the

program.

Power-Down State: In the power-down state, the CPU operation halts and power consumption

declines. The SLEEP instruction places the CPU in the power-down state. This state has two

modes: sleep mode and standby mode. In addition, driving the

HSTBY pin low while the RES pin

is low causes a transition to hardware standby mode.

Bus Release State: In the bus release state, the CPU releases access rights to the bus to the device

that has requested them.

SH7052 Datasheet(PDF) 78 Page - Renesas Technology Corp