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SH7052 Datasheet(PDF) 770 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 770 Page - Renesas Technology Corp |
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770 / 919 page  744 21.2.6 Block Configuration The flash memory is divided into five 64 kB blocks, one 32 kB block, and eight 4 kB blocks. Address H'5FFFF Address H'00000 64 kB 64 kB 64 kB 64 kB 64 kB 32 kB 384 kB 4 kB × 8 Figure 21.7 Block Configuration 21.3 Pin Configuration The flash memory is controlled by means of the pins shown in table 21.2. Table 21.2 Pin Configuration Pin Name Abbreviation I/O Function Reset RES Input Reset Flash write enable FWE Input Flash program/erase protection by hardware Mode 2 MD2 Input Sets SH7054F operating mode Mode 1 MD1 Input Sets SH7054F operating mode Mode 0 MD0 Input Sets SH7054F operating mode Transmit data TxD1 Output Serial transmit data output Receive data RxD1 Input Serial receive data input |
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