SH7052 datasheet(915/919 Pages) RENESAS

915 / 919 page

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Table B.3

Pin States (3)

Pin State

Type

Pin Name

Hardware Standby

AUD Module Standby

AUD Reset

(

AUDRST = L)

Software Standby

AUDSRST = 1 /

Normal Operation

No Connection

AUD

AUDRST

Pulled down internally

AUDMD

Pulled up internally

AUDATA0

AUDATA3

AUDMD = H : I

AUDMD = L : HO Pulled up

internally

AUDMD = H : I/O

AUDMD = L : O

Pulled up internally

AUDCK

AUDMD = H : I

AUDMD = L : HO Pulled up

internally

AUDMD = H : I/O

AUDMD = L : O

Pulled up internally

AUDSYNC

AUDMD = H : I

AUDMD = L : HO Pulled up

internally

AUDMD = H : I/O

AUDMD = L : O

Pulled up internally

Legend:

—: Not initial value

Input

O: Output

H: High-level

L: Low-level

Z: High impedance

K: Input pins become high-impedance, output pins retain their state.

Notes: 1. When the port impedance bit (HIZ) in the standby control register (SBYCR) is set to 1,

output pins become high-impedance.

2. When the CKHIZ bit in PFCRH is set to 1, becomes high-impedance unconditionally.

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