SH7052 datasheet(171/919 Pages) RENESAS

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9.2.4

DMA Channel Control Registers 0 to 3 (CHCR0 to CHCR3)

DMA channel control registers 0 to 3 (CHCR0 to CHCR3) are 32-bit readable/writable registers

that designate the operation and transmission of each channel. CHCR register bits are initialized to

0 by a power-on reset and in standby mode.

Bit:

——

—DI

———

Initial value:

R/W:

R/W*

Bit:

—

RS4

RS3

RS2

RS1

RS0

Initial value:

R/W:

R/W

R/W*

R/W

Bit:

—

SM1

SM0

—

DM1

DM0

Initial value:

R/W:

R/W

Bit:

—

TS1

TS0

Initial value:

R/W:

R/W

R/(W)*

R/W

Notes: 1. TE bit: Allows only a 0 write after reading 1.

2. The DI and RO bits may be absent, depending on the channel.

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