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7540 Datasheet(PDF) 197 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 197 Page - Renesas Technology Corp |
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197 / 366 page ![]() 2-121 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 7540 Group APPLICATION 2.7 Serial I/O2 Fig. 2.7.3 Structure of Serial I/O2 control register Fig. 2.7.4 Structure of Serial I/O2 register b7b6b5b4b3 b2b1b0 B Function At reset RW 0 1 2 3 4 5 6 7 Name 0 0 0 0 Serial I/O2 control register (SIO2CON) [Address : 3016] Nothing is allocated for this bit. This is a write disabled bit. When this bit is read out, the value is “0”. ✕ ✕ Serial I/O2 control register 0 0 Note: When using it as a SDATA input, set the port P13 direction register bit to “0”. 0 : LSB first 1 : MSB first 0 0 0 : f(XIN)/8 0 0 1 : f(XIN)/16 0 1 0 : f(XIN)/32 0 1 1 : f(XIN)/64 1 1 0 : f(XIN)/128 1 1 1 : f(XIN)/256 Internal synchronous clock selection bits Transfer direction selection bit b2 b1 b0 SDATA2 pin selection bit (Note) 0 : I/O port / SDATA2 input 1 : SDATA2 output SCLK2 pin selection bit 0 : External clock (SCLK2 is input) 1 : Internal clock (SCLK2 is output) Transmit / receive shift completion flag 0 : shift in progress 1 : shift completed 0 0 Serial I/O2 register b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 5 6 7 ? ? ? ? ? ? ? ? Serial I/O2 register (SIO2) [Address : 31 16] A shift register for serial transmission and reception. • At transmitting : Set a transmission data. • At receiving : A reception data is stored. |
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