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7540 Datasheet(PDF) 199 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 199 Page - Renesas Technology Corp |
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199 / 366 page ![]() 2-123 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 7540 Group APPLICATION 2.7 Serial I/O2 Fig. 2.7.7 Setting method for serial I/O2 2.7.3 Application example of serial I/O2 (1) Serial I/O2 setting method Figure 2.7.7 and Figure 2.7.8 show the setting method for the serial I/O2. b7b0 b7 b0 0 b7b0 0 Port P1 direction register (P1D) [Address 0316] b7b0 P12/SCLK2 pin (Note 1) P13/SDATA2 pin (Notes 2, 3) Interrupt control register 2 (ICON2) [Address 3F16] Serial I/O2 interrupt disabled Internal synchronous clock selected (set in internal clock selected) b2b1b0 0 0 0: f(XIN)/8 0 0 1: f(XIN)/16 0 1 0: f(XIN)/32 0 1 1: f(XIN)/64 1 1 0: f(XIN)/128 1 1 1: f(XIN)/256 SDATA2 pin selected 0: I/O port/SDATA2 input (at receive) 1: SDATA2 output (at transmit) Transfer direction selected 0: LSB first 1: MSB first SCLK2 pin selected 0: External clock (SCLK2 is input) 1: Internal clock (SCLK2 is outpu) Serial I/O2 control register (SIO2CON) [Address 3016] Process 3: Set serial I/O2 control register. Process 1: Disable serial I/O2 transmit/receive interrupt. Process 4: In order not to execute the no requested interrupt processing, set “0” (no requested) to the serial I/O2 interrupt request bit. Interrupt request register 2 (IREQ2) [Address 3D16] No serial I/O2 interrupt request issued Notes 1: When an external clock input is selected, set P12/SCLK2 pin to the input mode. 2: When P13/SDATA2 pin is used as the P13 pin, set this bit to “0”. 3: When this bit is set to “0” at transmit and the internal clock is selected for SCLK2, the SDATA2 pin is in a high impedance state after the data transfer is completed. Process 2: Set port P1 according to the usage condition. |
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