Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

7540 Datasheet(PDF) 310 Page - Renesas Technology Corp

Part # 7540
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES
PDF  366 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7540 Datasheet(HTML) 310 Page - Renesas Technology Corp

Back Button 7540 Datasheet HTML 306Page - Renesas Technology Corp 7540 Datasheet HTML 307Page - Renesas Technology Corp 7540 Datasheet HTML 308Page - Renesas Technology Corp 7540 Datasheet HTML 309Page - Renesas Technology Corp 7540 Datasheet HTML 310Page - Renesas Technology Corp 7540 Datasheet HTML 311Page - Renesas Technology Corp 7540 Datasheet HTML 312Page - Renesas Technology Corp 7540 Datasheet HTML 313Page - Renesas Technology Corp 7540 Datasheet HTML 314Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 310 / 366 page
background image
3-88
REJ09B0018-0200Z
Rev.2.00
Jun 21, 2004
APPENDIX
7540 Group
3.3 Notes on use
3.3.15 Notes on programming
(1) Processor status register
➀ Initializing of processor status register
Flags which affect program execution must be initialized after a reset.
In particular, it is essential to initialize the T and D flags because they have an important effect
on calculations.
q Reason
After a reset, the contents of the processor status register (PS) are undefined except for the I
flag which is “1”.
Reset
↓
Initializing of flags
↓
Main program
Fig. 3.3.10 Stack memory contents after PHP
instruction execution
PLP instruction execution
↓
NOP
➁ How to reference the processor status register
To reference the contents of the processor status register (PS), execute the PHP instruction once
then read the contents of (S+1). If necessary, execute the PLP instruction to return the PS to its
original status.
A NOP instruction should be executed after every PLP instruction.
Fig. 3.3.8 Initialization of processor status register
Fig. 3.3.9 Sequence of PLP instruction execution
(S)
(S)+1
Stored PS



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com