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7540 Datasheet(PDF) 307 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 366 page ![]() 3-85 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 7540 Group APPENDIX 3.3 Notes on use 3.3.12 Notes on CPU mode register (1) Switching method of CPU mode register after releasing reset Switch the CPU mode register (CPUM) at the head of program after releasing reset in the following method. Fig. 3.3.4 Switching method of CPU mode register (2) CPU mode register Bits 5, 1 and 0 of CPU mode register are used to select oscillation mode and to control operation modes of the microcomputer. In order to prevent the dead-lock by error-writing (ex. program run- away), these bits can be rewritten only once after releasing reset. After rewriting it is disable to write any data to the bit. (The emulator MCU “M37540RSS” is excluded.) Also, when the read-modify-write instructions (SEB, CLB) are executed to bits 2 to 4, 6 and 7, bits 5, 1 and 0 are locked. After releasing reset Switch the oscillation mode selection bit (bit 5 of CPUM) Switch the clock division ratio selection bits (bits 6 and 7 of CPUM) Main routine Start with an on-chip oscillator (Note) An initial value is set as a ceramic oscillation mode. When it is switched to an RC oscillation, its oscillation starts. Select 1/1, 1/2, 1/8 or on-chip oscillator. Wait by on-chip oscillator operation until establishment of oscillator clock When using a ceramic oscillation, wait until establlishment of oscillation from oscillation starts. When using an RC oscillation, wait time is not required basically (time to execute the instruction to switch from an on-chip oscillator meets the requirement). Note. After releasing reset the operation starts by starting an on-chip oscillator automatically. Do not use an on-chip oscillator at ordinary operation. |
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