7540 datasheet(322/366 Pages) RENESAS

322 / 366 page

3-100

REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

APPENDIX

7540 Group

3.5 List of registers

Fig. 3.5.5 Structure of Pull-up control register

Fig. 3.5.6 Structure of Port P1P3 control register

Pull-up control register

b7b6b5b4b3b2b1b0

Function

At reset

Name

P00 pull-up control bit

Pull-up control register (PULL) [Address : 1616]

0 : Pull-up Off

1 : Pull-up On

Note: Pins set to output are disconnected from the pull-up control.

P01 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

P02, P03 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

P04 – P07 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

P30 – P33 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

P34 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

P35, P36 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

P37 pull-up control bit

0 : Pull-up Off

1 : Pull-up On

Port P1P3 control register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

P37/INT0 input level selection

bit

Port P1P3 control register (P1P3C) [Address : 17 16]

0 : CMOS level

1 : TTL level

P36/INT1 input level selection

bit (Note)

0 : CMOS level

1 : TTL level

P10, P12,P13 input level

selection bit

0 : CMOS level

1 : TTL level

Nothing is allocated for these bits. These are write disabled bits.

When these bits are read out, the values are “0”.

Note: Keep setting the P3 6/INT1 input level selection bit to “0” (initial value) for the

32-pin package version.

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