SH7730 datasheet(22/1188 Pages) RENESAS

22 / 1188 page

Rev. 1.00 Sep. 19, 2007 Page xxii of xlviii

24.3.11

UART Status Register 2 (IRIF_UART_STS2) ...................................................... 787

24.3.12

UART Control Register (IRIF_UART0) ............................................................... 788

24.3.13

UART Status Register (IRIF_UART1).................................................................. 789

24.3.14

UART Mode Register (IRIF_UART2) .................................................................. 792

24.3.15

UART Transmit Data Register (IRIF_UART3)..................................................... 793

24.3.16

UART Receive Data Register (IRIF_UART4) ...................................................... 794

24.3.17

UART Interrupt Mask Register (IRIF_UART5).................................................... 794

24.3.18

UART Baud Rate Error Correction Register (IRIF_UART6)................................ 796

24.3.19

UART Baud Rate Count Set Register (IRIF_UART7) .......................................... 797

24.3.20

CRC Engine Control Register (IRIF_CRC0)......................................................... 797

24.3.21

CRC Engine Input Data Register (IRIF_CRC1) .................................................... 798

24.3.22

CRC Engine Calculation Register (IRIF_CRC2)................................................... 799

24.3.23

CRC Engine Output Data Register 1 (IRIF_CRC3)............................................... 799

24.3.24

CRC Engine Output Data Register 2 (IRIF_CRC4)............................................... 800

24.4

Operation .......................................................................................................................... 801

24.4.1

UART..................................................................................................................... 801

24.4.2

Transmit and Receive Pulse Modulation and Demodulation ................................. 805

24.4.3

CRC Engine ........................................................................................................... 809

24.4.4

Communication Flow............................................................................................. 810

24.5

Notes on Data Transmission and Reception ..................................................................... 814

Section 25 SIM Card Module (SIM) ................................................................. 815

25.1

Features............................................................................................................................. 815

25.2

Input/Output Pins.............................................................................................................. 817

25.3

Register Descriptions........................................................................................................ 817

25.3.1

Serial Mode Register (SCSMR)............................................................................. 819

25.3.2

Bit Rate Register (SCBRR).................................................................................... 820

25.3.3

Serial Control Register (SCSCR)........................................................................... 820

25.3.4

Transmit Shift Register (SCTSR) .......................................................................... 824

25.3.5

Transmit Data Register (SCTDR) .......................................................................... 824

25.3.6

Serial Status Register (SCSSR).............................................................................. 825

25.3.7

Receive Shift Register (SCRSR)............................................................................ 830

25.3.8

Receive Data Register (SCRDR) ........................................................................... 831

25.3.9

Smart Card Mode Register (SCSCMR) ................................................................. 831

25.3.10

Serial Control 2 Register (SCSC2R) ...................................................................... 833

25.3.11

Guard Extension Register (SCGRD)...................................................................... 834

25.3.12

Wait Time Register (SCWAIT) ............................................................................. 835

25.3.13

Sampling Register (SCSMPL) ............................................................................... 835

25.3.14

DMA Enable Register (SCDMAEN) ..................................................................... 836

25.4

Operation .......................................................................................................................... 837

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