7220 datasheet(228/303 Pages) RENESAS

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7220 Group User’s Manual

APPENDIX

6.3 Notes on use

6-9

6.3.8 Notes on input and output pins

(1)

Fix of a port input level in stand-by state

In stand-by stateV2 for low-power dissipation, do not make input levels of an input port and an I/O

port “undefined,” especially for I/O ports of the P-channel and the N-channel open-drain.

Pull-up (connect the port to VCC) or pull-down (connect the port to VSS) these ports through a resistor.

When determining a resistance value, note the following points:

qExternal circuit

qVariation of output levels during the ordinary operation

When using built-in pull-up or pull-down resistor, note on varied current values.

qWhen setting as an input port : fix its input level

qWhen setting as an output port : prevent current from flowing out to external

Reason

Even when setting as an output port with its direction register, in the following state :

qN-channel......when the content of the port latch is “1”

the transistor becomes the OFF state, which causes the ports to be the high-impedance state. Note

that the level becomes “undefined” depending on external circuits.

Accordingly, the potential which is input to the input buffer in a microcomputer is unstable in the

state that input levels of a input port and an I/O port are “undefined.” This may cause power source

current.

V2 stand-by state : the stop mode by executing the STP instruction

the wait mode by executing the WIT instruction

(2)

Modify of the contents of I/O port latch

When the port latch of an I/O port is modified with the bit managing instructionV3, the value of the

unspecified bit may be changed.

Reason

The bit managing instructionsV3 are read-modify-write form instructions for reading and writing data

by a byte unit. Accordingly, when these instructions are executed on a bit of the data register of an

I/O port, the following is executed to all bits of the data register.

qAs for a bit which is set for an input port :

The pin state is read in the CPU, and is written to this bit after bit managing.

qAs for a bit which is set for an output port :

The bit value is read in the CPU, and is written to this bit after bit managing.

Note the following :

qEven when a port which is set as an output port is changed for an input port, its data register holds

the output data.

qAs for a bit of which is set for an input port, its value may be changed even when not specified

with a bit managing instruction in case where the pin state differs from its data register contents

V3 bit managing instructions : SEB, and CLB instruction

6.3.9 Note on JMP instruction

When using the JMP instruction (the indirect addressing mode), do not specify the last address in a page

as an indirect address.

Memory (addresses 000016 to FFFF16) is separated into pages (by each 256 address).

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