7220 datasheet(230/303 Pages) RENESAS

230 / 303 page

7220 Group User’s Manual

APPENDIX

6.4 Countermeasures against noise

6-11

6.4 Countermeasures against noise

Countermeasures against noise are described below. The following countermeasures are effective against

noise in theory, however, it is necessary not only to take measures as follows but to evaluate before actual

use.

6.4.1 Shortest wiring length

The wiring on a printed circuit board can function as an antenna which feeds noise into the microcomputer.

The shorter the total wiring length (by mm unit), the less the possibility of noise insertion into a microcomputer.

(1)

Wiring for reset input pin

Make the length of wiring which is connected

to the RESET input pin as short as possible.

Especially, connect a capacitor across the

RESET input pin and the VSS pin with the

shortest possible wiring (within 20mm).

Reason

The width of a pulse input into the RESET

pin is determined by the timing necessary

conditions. If noise having a shorter pulse width

than the standard is input to the RESET input

pin, the reset is released before the internal

state of the microcomputer is completely

initialized. This may cause a program runaway.

(2)

Wiring for clock input/output pins

qMake the length of wiring which is connected

to clock

qI/O pins as short as possible.

qMake the length of wiring (within 20mm)

across the grounding lead of a capacitor

which is connected to an oscillator and the

VSS pin of a microcomputer as short as

possible.

qSeparate the VSS pattern only for oscillation

from other VSS patterns.

Reason

If noise enters clock I/O pins, clock waveforms

may be deformed. This may cause a program

failure or program runaway. Also, if a potential

difference is caused by the noise between

the VSS level of a microcomputer and the VSS

level of an oscillator, the correct clock will not

be input in the microcomputer.

RESET

Reset

circuit

Noise

VSS

Reset

circuit

VSS

RESET

VSS

N.G.

O.K.

Fig.6.4.1 Wiring for RESET input pin

Noise

XIN

XOUT

VSS

XIN

XOUT

VSS

N.G.

O.K.

Fig.6.4.2 Wiring for clock I/O pin

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