H83069RF datasheet(153/1003 Pages) RENESAS

153 / 1003 page

Rev. 5.0, 09/04, page 131 of 978

Bit 3—Reserved: This bit cannot be modified and is always read as 1.

Bit 2—TP Cycle Control (TPC): Selects whether a 1-state or two-state precharge cycle (T

P) is to

be used for DRAM read/write cycles and CAS-before-RAS refresh cycles.

The setting of this bit does not affect the self-refresh function.

Bit 2

TPC

Description

1-state precharge cycle inserted

(Initial value)

2-state precharge cycle inserted

Bit 1—

RAS

RAS-CAS

CAS

CAS Wait (RCW): Controls wait state (Trw) insertion between T

r and Tc1 in DRAM

read/write cycles. The setting of this bit does not affect refresh cycles.

Bit 1

RCW

Description

Wait state (Trw) insertion disabled

(Initial value)

One wait state (Trw) inserted

Bit 0—Refresh Cycle Wait Control (RLW): Controls wait state (T

RW) insertion for CAS-before-

RAS refresh cycles. The setting of this bit does not affect DRAM read/write cycles.

Bit 0

RLW

Description

Wait state (T

RW) insertion disabled

(Initial value)

One wait state (T

RW) inserted

6.2.9

Refresh Timer Control/Status Register (RTMCSR)

CKS0

———

Initial value

0111

Read/Write

R/W

——

—

R(W)*

R/W

76543210

CMF

CMIE

CKS2

CKS1

Bit

RTMCSR is an 8-bit readable/writable register that selects the refresh timer counter clock. When

the refresh timer is used as an interval timer, RTMCSR also enables or disables interrupt requests.

Bits 7 and 6 of RTMCSR are initialized to 0 by a reset and in the standby modes. Bits 5 to 3 are

initialized to 0 by a reset and in hardware standby mode; they are not initialized in software

standby mode.

H83069RF Datasheet(PDF) 153 Page - Renesas Technology Corp

H83069RF Datasheet(HTML) 153 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL