H83069RF datasheet(206/1003 Pages) RENESAS

206 / 1003 page

Rev. 5.0, 09/04, page 184 of 978

6.7

Interrupt Sources

Compare match interrupts (CMI) can be generated when the refresh timer is used as an interval

timer. Compare match interrupt requests are masked/unmasked with the CMIE bit in RTMCSR.

6.8

Burst ROM Interface

6.8.1

Overview

With the H8/3069R, external space area 0 can be designated as burst ROM space, and burst ROM

space interfacing can be performed. The burst ROM space interface enables 16-bit organization

ROM with burst access capability to be accessed at high speed. Area 0 is designated as burst

ROM space by means of the BROME bit in BCR.

Continuous burst access of a maximum or four or eight words can be performed on external space

area 0. Two or three states can be selected for burst access.

6.8.2

Basic Timing

The number of states in the initial cycle (full access) and a burst cycle of the burst ROM interface

is determined by the setting of the AST0 bit in ASTCR. When the AST0 bit is set to 1, wait states

can also be inserted in the initial cycle. Wait states cannot be inserted in a burst cycle.

Burst access of up to four words is performed when the BRSTS0 bit is cleared to 0 in BCR, and

burst access of up to eight words when the BRSTS0 bit is set to 1. The number of burst access

states is two when the BRSTS1 bit is cleared to 0, and three when the BRSTS1 bit is set to 1.

The basic access timing for burst ROM space is shown in figure 6.42.

H83069RF Datasheet(PDF) 206 Page - Renesas Technology Corp